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Annemie Van Ammel

Katholieke Universiteit Leuven

14

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53

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Thermal and plasma treatments for improved (sub-)1 nm equivalent oxide thickness planar and FinFET-based replacement metal gate high-k last devices and enabling a simplified scalable CMOS integration scheme

2014 Japanese Journal of Applied Physics
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Thermal and SF6-plasma treatments for improved (sub-)1nm EOT planar and FinFET-based RMG high-k last devices and enabling a simplified scalable CMOS integration scheme

2013
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Effective Work Function Engineering for Aggressively Scaled Planar and Multi-Gate Fin Field-Effect Transistor-Based Devices with High-k Last Replacement Metal Gate Technology

2013 Japanese Journal of Applied Physics
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W versus Co--Al as Gate Fill-Metal for Aggressively Scaled Replacement High-k/Metal Gate Devices for (Sub-)22 nm Technology Nodes

2013 Japanese Journal of Applied Physics
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On the thermal stability of physically-vapor-deposited diffusion barriers in 3D Through-Silicon Vias during IC processing

2013 Microelectronic Engineering
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Thermal stability of copper Through-Silicon Via barriers during IC processing

2011 IITC | International Interconnect Technology Conference
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Seedless Copper Electrochemical Deposition on PVD Resistive Substrates as a Replacement/Enhancement for PVD Cu Seed Layers in HAR TSVs

2010
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Tantalum-based Gate Electrode Metals for Advanced CMOS Applications

2006
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Implementation of Atomic Layer Deposition in Advanced Semiconductor Processes

2006
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Citations (2)