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Sarasvathi Thangaraju

Katholieke Universiteit Leuven

8

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259

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On the thermal stability of physically-vapor-deposited diffusion barriers in 3D Through-Silicon Vias during IC processing

2013 Microelectronic Engineering
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Technology Assessment of Through-Silicon Via by Using $C$ – $V$ and $C$ – $t$ Measurements

2011 IEEE Electron Device Letters
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Thermal stability of copper Through-Silicon Via barriers during IC processing

2011 IITC | International Interconnect Technology Conference
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Comprehensive analysis of the impact of single and arrays of through silicon vias induced stress on high-k / metal gate CMOS performance

2010 IEDM | International Electron Devices Meeting
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Citations (103)