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Gregory B. Shinn

Texas Instruments

16

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160

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A designer friendly 45nm high performance technology with in-situ C-doped e-SiGe & dual stress liner in SRAM

2008 VLSIT | Symposium on VLSI Technology
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Full-Bit Functional, High-Density 8 Mbit One Transistor–One Capacitor Ferroelectric Random Access Memory Embedded within a Low-Power 130 nm Logic Process

2007 Japanese Journal of Applied Physics
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Chemical-Mechanical Polishing

2007
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Reliability Demonstration of a Ferroelectric Random Access Memory Embedded within a 130nm CMOS Process

2007 NVMTS | Non-Volatile Memory Technology Symposium
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Manufacturable High-Density 8Mb 1T-1C FRAM Embedded Within a Low-Power 130nm Logic Process

2007 The Japan Society of Applied Physics
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Full-Bit Functional, High-Density 8Mb 1T-1C FRAM Embedded Within a Low-Power 130nm Logic Process

2006 The Japan Society of Applied Physics
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Understanding and eliminating defects in electroplated Cu films

2001 IITC | International Interconnect Technology Conference
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Chemical–mechanical polishing of SiOC organosilicate glasses: the effect of film carbon content

2001 Thin Solid Films
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De-vice independent process control of chemical-mechanical polishing

1999
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Wafer-Scale Modeling of Pattern Effect in Oxide Chemical Mechanical Polishing

1997
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Citations (9)