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K. Okano

Toshiba

30

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424

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Technology of FinFET for High RF and Analog/Mixed-Signal Performance Circuits

2015 IEICE Transactions on Electronics
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The optimum device parameters for high RF and analog/MS performance in planar MOSFET and FinFET

2012 VLSIT | Symposium on VLSI Technology
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Advantage of Plasma Doping for Source/Drain Extension in Bulk-FinFET

2010 The Japan Society of Applied Physics
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Impact of Transistor Layout Configuration on Current Drive Performance in (100)/ and (100)/ SiGe channel pMOSFETs: Comparative Study to Si channel

2010 The Japan Society of Applied Physics
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High electron mobility enhancement on (110) surface due to uniaxial strain and its impact on short channel device performance of SOl FinFETs

2008 SNW | IEEE Silicon Nanoelectronics Workshop
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A cost-conscious 32nm CMOS platform technology with advanced single exposure lithography and gate-first metal gate/high-k process

2008 IEDM | International Electron Devices Meeting
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Direct evaluation of DC characteristic variability in FinFET SRAM Cell for 32 nm node and beyond

2007 IEDM | International Electron Devices Meeting
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FinFET Process and Integration Technology for High Performance LSI in 22 nm node and beyond

2007 IWJT | International Workshop on Junction Technology
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Improvement ofDriveCurrent inBulk-FinFET using Full3D Process/DeviceSimulations

2006 International Conference on Simulation of Semiconductor Processes and Devices
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FinFET: the prospective multi-gate device for future SoC applications

2006 ESSDERC | European Solid-State Device Research Conference
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