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Juhoon Yoon

Amkor Technology

11

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50

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Wafer Level Multi-chip Gang Bonding Using TCNCF

2016 ECTC | Electronic Components and Technology Conference
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Double Side SMT and Molding Process Development for mPossum Package

2016
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Parametric Study of Low-k Layer Stress for a Flip-Chip Chip Size Package Using a Copper Pillar Bump

2016 Nanoscience and Nanotechnology Letters
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Copper foil exposed structure for thin PoP warpage improvement

2015 ECTC | Electronic Components and Technology Conference
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Development of chip-on-chip with face to face technology as a low cost alternative for 3D packaging

2013 ECTC | Electronic Components and Technology Conference
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