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K. Tomita
K. Tomita
Mitsubishi
Electronic engineering
Engineering
Static random-access memory
Electrical engineering
CMOS
3
Papers
9
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Sub-1 /spl mu/m/sup 2/ high density embedded SRAM technologies for 100 nm generation SOC and beyond
2002
VLSIT | Symposium on VLSI Technology
K. Tomita
K. Hashimoto
T. Inbe
Toshiyuki Oashi
Katsuhiro Tsukamoto
Y. Nishioka
M. Matsuura
Takahisa Eimori
M. Inuishi
I. Miyanaga
M. Nakamura
T. Kishimoto
T. Yamada
K. Eriguchi
H. Yuasa
T. Satake
A. Kajiya
M. Ogura
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Sub-1pm2 High Density Embedlded SRAM Technologies for lOOnm Generation SOC and Beyond
2002
Symposium on VLSI Technology
K. Tomita
K. Hashimoto
T. Inbe
Toshiyuki Oashi
Y. Nishioka
M. Matsuura
Takahisa Eimori
M. Inuishi
I. Miyanaga
M. Nakamura
T. Kishimoto
T. Yamada
H. Yuasa
T. Satake
A. Kajiya
M. Ogura
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High density embedded DRAM technology with 0.38 /spl mu/m pitch in DRAM and 0.42 /spl mu/m pitch in LOGIC by W/PolySi gate and Cu dual damascene metallization
2000
VLSIT | Symposium on VLSI Technology
N. Takenaka
M. Segawa
Takashi Uehara
S Akamatsu
Michikazu Matsumoto
K. Kurimoto
T. Ueda
H. Watanabe
T. Matsutani
K. Yoneda
A. Koshio
Yoshiaki Kato
Masahide Inuishi
Toshiyuki Oashi
K. Tsukamoto
Shigeki Komori
K. Tomita
T. Inbe
R. Ohsaki
T. Hanawa
S. Sakamori
Masayoshi Shirahata
J. Tsuchimoto
T. Eimori
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Citations (7)
1