Old Web
English
Sign In
Acemap
>
authorDetail
>
Fredy Quan
Fredy Quan
Rambus
Computer science
Electronic engineering
Bit error rate
S-LINK
Timing margin
5
Papers
119
Citations
0.00
KQI
Citation Trend
Filter By
Interval:
1900~2024
1900
2024
Author
Papers (4)
Sort By
Default
Most Recent
Most Early
Most Citation
No data
Journal
Conference
Others
A 16 Gb/s/Link, 64 GB/s Bidirectional Asymmetric Memory Interface
2009
IEEE Journal of Solid-state Circuits
Hae-Chang Lee
Kun-Yung Ken Chang
Jung-Hoon Chun
Ting Wu
Yohan Frans
Brian S. Leibowitz
Nhat Nguyen
T. J. Chin
Kambiz Kaviani
Jie Shen
Xudong Shi
Wendemagegnehu T. Beyene
Simon Li
Reza Navid
Marko Aleksic
Fred S. Lee
Fredy Quan
Jared L. Zerbe
Rich Perego
Fariborz Assaderaghi
Show All
Source
Cite
Save
Citations (50)
A 16 Gb/s/Link, 64 GB/s Bidirectional Asymmetric Memory Interface
2009
VLSIC | Symposium on VLSI Circuits
Hae-Chang Lee
Kun-Yung Ken Chang
Jung-Hoon Chun
Ting Wu
Yohan Frans
Brian S. Leibowitz
Nhat Nguyen
T. J. Chin
Kambiz Kaviani
Jie Shen
Xudong Shi
Wendemagegnehu T. Beyene
Simon Li
Reza Navid
Marko Aleksic
Fred S. Lee
Fredy Quan
Jared L. Zerbe
Rich Perego
Fariborz Assaderaghi
Show All
Source
Cite
Save
Citations (4)
A 16-Gb/s differential I/O cell with 380fs RJ in an emulated 40nm DRAM process
2008
VLSIC | Symposium on VLSI Circuits
Nhat Nguyen
Yohan Frans
Brian S. Leibowitz
Simon Li
Reza Navid
Marko Aleksic
Fred S. Lee
Fredy Quan
Jared L. Zerbe
Rich Perego
Fari Assaderaghi
Show All
Source
Cite
Save
Citations (26)
A 16Gb/s/link, 64GB/s bidirectional asymmetric memory interface cell
2008
VLSIC | Symposium on VLSI Circuits
Ken Chang
Hae-Chang Lee
Jung-Hoon Chun
Ting Wu
T. J. Chin
Kambiz Kaviani
Jie Shen
Xudong Shi
Wendem Beyene
Yohan Frans
Brian S. Leibowitz
Nhat Nguyen
Fredy Quan
Jared L. Zerbe
Rich Perego
Fari Assaderaghi
Show All
Source
Cite
Save
Citations (36)
1