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Rich Perego

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A 16 Gb/s/Link, 64 GB/s Bidirectional Asymmetric Memory Interface

2009 IEEE Journal of Solid-state Circuits
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A 16 Gb/s/Link, 64 GB/s Bidirectional Asymmetric Memory Interface

2009 VLSIC | Symposium on VLSI Circuits
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Design and analysis of a TB/sec memory system

2008 EPEP | Electrical Performance of Electronic Packaging
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A 16-Gb/s differential I/O cell with 380fs RJ in an emulated 40nm DRAM process

2008 VLSIC | Symposium on VLSI Circuits
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A 16Gb/s/link, 64GB/s bidirectional asymmetric memory interface cell

2008 VLSIC | Symposium on VLSI Circuits
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Citations (36)