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Jay Shah
Jay Shah
Applied Materials
Engineering
Electronic engineering
Multiple patterning
Image segmentation
Logic gate
3
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Integration of Computer-Aided Design (CAD) Information into a Defect-Review SEM Platform and Design Based Automatic Defect Classification : DI: Defect Inspection and Reduction
2019
ASMC | Advanced Semiconductor Manufacturing Conference
Teresa A. Esposito
Jay Shah
A. Jain
Felix Levitov
John G. Sheridan
Shashi Shekhar
Shih Hui Jen
Victor Aristov
Hoang Nguyen
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Mask qualification of a shifted gate contact issue by physical e-beam inspection and high landing energy SEM review : DI: Defect Inspection and Reduction
2019
ASMC | Advanced Semiconductor Manufacturing Conference
John G. Sheridan
Hsiao-Chi Peng
Chih-Chung Huang
Victor Aristov
Hoang Nguyen
Yashdeep Khopkar
A. Jain
Jay Shah
Felix Levitov
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Design based automatic defect classification at advanced technology nodes: DI: Defect inspection and reduction
2018
ASMC | Advanced Semiconductor Manufacturing Conference
Jay Shah
Abhinav Jain
Felix Levitov
Shay Yasharzade
John G. Sheridan
Vu Nguyen
Hoang Nguyen
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