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J. Machillot
J. Machillot
Applied Materials
Optoelectronics
Nanowire
Physics
Transistor
Work function
5
Papers
97
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Exploring W-Cu hybrid dual damascene metallization for future nodes
2021
IITC | International Interconnect Technology Conference
Marleen H. van der Veen
O. Varela Pedreira
Nancy Heylen
N. Jourdan
S. Lariviere
S. Park
Herbert Struyf
Zs. Tokei
W. Lei
Pethe Shirish
S. Hwang
Feng Chen
Zhiyuan Wu
J. Machillot
A. Cockburn
A. Jansen
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3D-carrier Profiling and Parasitic Resistance Analysis in Vertically Stacked Gate-All-Around Si Nanowire CMOS Transistors
2019
IEDM | International Electron Devices Meeting
Pierre Eyben
J. Machillot
M. Kim
T. Miyashita
Naomi Yoshida
Hugo Bender
O. Richard
Kristof Paredis
L. Wouters
Jerome Mitard
Naoto Horiguchi
Romain Ritzenthaler
A. De Keersgieter
Umberto Celano
Thomas Chiarella
Anabela Veloso
Hans Mertens
V. Pena
Gaetano Santoro
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Vertically Stacked Gate-All-Around Si Nanowire CMOS Transistors with Reduced Vertical Nanowires Separation, New Work Function Metal Gate Solutions, and DC/AC Performance Optimization
2018
IEDM | International Electron Devices Meeting
Romain Ritzenthaler
Hans Mertens
V. Pena
G. Santoro
Adrian Chasin
K. Kenis
K. Devriendt
G. Mannaert
H. Dekkers
A. Dangol
Y. Lin
Shiyu Sun
Z. Chen
M. Kim
J. Machillot
Jerome Mitard
Naomi Yoshida
Nam Sung Kim
D. Mocuta
Naoto Horiguchi
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Citations (26)
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