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F. Balestra

Centre national de la recherche scientifique

36

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201

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Novel Fine-Grain Back-Bias Assist Techniques for 3D-Monolithic 14nm FDSOI Top-Tier SRAMs

2019 Solid-state Electronics
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Challenges for high performance and very low power operation at the end of the Roadmap

2019 Solid-state Electronics
- F. Balestra
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Nanoscale Devices for the end of the Roadmap

2019 ASICON | International Conference on ASIC
- F. Balestra
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Back-bias impact on variability and BTI for 3D-monolithic 14nm FDSOI SRAMs applications

2019 EUROSOI-ULIS | Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon
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Novel Fine-Grain Back-Bias Assist Techniques for 14nm FDSOI Top-Tier SRAMs integrated in 3D-Monolithic

2019 VLSIT | Symposium on VLSI Technology
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Nanoscale FETs for high performance and ultra low power operation at the end of the Roadmap

2018 ICSICT | IEEE International Conference on Solid-State and Integrated Circuit Technology
- F. Balestra
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(Invited) Evaluation of Stacked Nanowires Transistors for CMOS: Performance and Technology Opportunities

2016
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(Invited) Challenges to Nano-Scale Device World

2015
- F. Balestra
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Silicon-based Devices and Materials for Nanoscale FETs

2011
- F. Balestra
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SOI - a platform for transition from micro to nano

2009 CAS | International Semiconductor Conference
- F. Balestra
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