Ultra thin hermetic wafer level, chip scale package

This paper presents a novel technology for hermetic wafer-level chip size packaging (WLCSP). The ultra thin surface mountable (SMT) package has a small footprint and addresses MEMS and IC applications in the emerging market for handheld devices. Our approach combines through-wafer interconnects (/spl mu/-vias), wafer-to-wafer bonding, subsequent thinning and solder bumping to obtain a small form factor package. The latter adds as little as 100 /spl mu/m to the final device, resulting in a total thickness of 0.5mm or less. The short interconnects enable true chip-size packages as small as 700/spl times/700 /spl mu/m for direct surface mount attach. In the paper we present the packaging concept, detailed description of the process and characterization of the electrical properties and sealing.