Investigating of SER in 28 nm FDSOI-Planar and Comparing with SER in Bulk-FinFET

Taiki Uemura,Byungjin Chung,Jeongmin Jo,Hai Jiang,Yongsung Ji,Tae-Young Jeong,Rakesh Ranjan,Young-in Park,Kiil Hong,Seungbae Lee,Hwa-Sung Rhee,Sangwoo Pae,Eun-Cheol Lee,Jaehee Choi,Shota Ohnishi,Ken Machida

Investigating of SER in 28 nm FDSOI-Planar and Comparing with SER in Bulk-FinFET

2020

Taiki Uemura
Byungjin Chung
Jeongmin Jo
Hai Jiang
Yongsung Ji
Tae-Young Jeong
Rakesh Ranjan
Young-in Park
Kiil Hong
Seungbae Lee
Hwa-Sung Rhee
Sangwoo Pae
Eun-Cheol Lee
Jaehee Choi
Shota Ohnishi
Ken Machida

This paper investigates soft error in memories and logic circuits in 28 nm planar-FDSOI technology by neutron, alpha, proton, and gamma-ray irradiation tests, and compares with SER in bulk-FinFET. The comparison elucidates the different SER trends between planar-FDSOI and bulk-FinFET.

Keywords:

Neutron
Electronic engineering
Engineering
Planar
Soft error
Optoelectronics
Irradiation
AND gate
Electronic circuit
Proton

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