Old Web
English
Sign In
Acemap
>
authorDetail
>
S. Novak
S. Novak
Intel
Electronic engineering
Transistor
Engineering
Logic gate
Electrical engineering
6
Papers
87
Citations
0.00
KQI
Citation Trend
Filter By
Interval:
1900~2024
1900
2024
Author
Papers (4)
Sort By
Default
Most Recent
Most Early
Most Citation
No data
Journal
Conference
Others
Aging model challenges in deeply scaled tri-gate technologies
2015
IIRW | International Integrated Reliability Workshop
S. Ramey
Y. Lu
I. Meric
S. Mudanai
S. Novak
C. Prasad
J. Hicks
Show All
Source
Cite
Save
Citations (7)
Transistor reliability variation correlation to threshold voltage
2015
IRPS | International Reliability Physics Symposium
S. Ramey
M. Chahal
Pinakpani Nayak
S. Novak
C. Prasad
J. Hicks
Show All
Source
Cite
Save
Citations (23)
Transistor aging and reliability in 14nm tri-gate technology
2015
IRPS | International Reliability Physics Symposium
S. Novak
C. Parker
D. Becher
Ming T. Liu
M. Agostinelli
M. Chahal
P. Packan
Pinakpani Nayak
S. Ramey
Sundararajan Natarajan
Show All
Source
Cite
Save
Citations (32)
Novel Charge Pumping method applied to tri-gate MOSFETs for reliability characterization
2015
IIRW | International Integrated Reliability Workshop
Brad C. Bittel
S. Novak
Steve Ramey
S. Padiyar
Jason T. Ryan
Jason P. Campbell
Kin P. Cheung
Show All
Source
Cite
Save
Citations (0)
1