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Chi Lim Tan

Katholieke Universiteit Leuven

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Junctionless Array with Ultrathin Poly\TiN Floating Gate and HfAlO Based Intergate Dielectric for Sub-15nm Planar NAND Flash

2016 IMW | International Memory Workshop
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Key contributors for improvement of line width roughness, line edge roughness, and critical dimension uniformity: 15 nm half-pitch patterning with extreme ultraviolet and self-aligned double patterning

2013 Journal of Micro-nanolithography Mems and Moems
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