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Tomoyuki Yamada
Tomoyuki Yamada
Kyocera
Electronic engineering
Materials science
Chip-scale package
Soldering
Flip chip
4
Papers
13
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0
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Reliability Demonstration of an Ultra-Thin Core (UTC) Large Die, Large Laminate Package
2016
ECTC | Electronic Components and Technology Conference
Tomoyuki Yamada
Michio Ohori
Fumio Kumokawa
Hiroyuki Fukushima
Sushumna Iruvanti
Shidong Li
Tuhin Sinha
Jeff Coffin
Hai P. Longworth
Charlie Reynolds
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Thermal and Reliability Demonstration of a Large Die on a Low CTE Chip Scale Package
2014
Tomoyuki Yamada
Masahiro Fukui
Kenji Terada
Masaaki Harazono
Teruya Fujisaki
Sushumna Iruvanti
Charles Carey
Yi Pan
Charlie Reynolds
Kamal K. Sikka
Brian R. Sundlof
Hilton T. Toy
Rebecca N. Wagner
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Organic Chip Scale Package (CSP) Development for Flip Chip Applications
2013
Tomoyuki Yamada
Masahiro Fukui
Kenji Terada
Masaaki Harazono
Teruya Fujisaki
Charles L. Reynolds
Jean Audet
Yi Pan
Scott Preston Moore
Sushumna Iruvanti
Hsichang Liu
Hongqing Zhang
Brian R. Sundlof
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Development of a Low CTE chip scale package
2013
ECTC | Electronic Components and Technology Conference
Tomoyuki Yamada
Masahiro Fukui
Kenji Terada
Masaaki Harazono
Charles L. Reynolds
Jean Audet
Sushumna Iruvanti
Hsichang Liu
Scott Preston Moore
Yi Pan
Hongqing Zhang
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Citations (11)
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