Old Web
English
Sign In
Acemap
>
authorDetail
>
Joong Sik Kih
Joong Sik Kih
Hanyang University
Logic gate
Architecture
Computer science
Electronic engineering
Dram
2
Papers
5
Citations
0.00
KQI
Citation Trend
Filter By
Interval:
1900~2024
1900
2024
Author
Papers (2)
Sort By
Default
Most Recent
Most Early
Most Citation
No data
Journal
Conference
Others
Fast parallel CRC & DBI calculation for high-speed memories: GDDR5 and DDR4
2011
ISCAS | International Symposium on Circuits and Systems
Jinyeong Moon
Joong Sik Kih
Show All
Source
Cite
Save
Citations (4)
A 7.7mW/1.0ns/1.35V delay locked loop with racing mode and OA-DCC for DRAM interface
2010
ISCAS | International Symposium on Circuits and Systems
Hyun Woo Lee
Yong-Hoon Kim
Won Joo Yun
Eun Young Park
Kang Youl Lee
Jae-il Kim
Kwang-Hyun Kim
Jong Ho Jung
Kyung-Whan Kim
Nam Gyu Rye
Kwan Weon Kim
Jun Hyun Chun
Chulwoo Kim
Young Jung Choi
Byong Tae Chung
Joong Sik Kih
Show All
Source
Cite
Save
Citations (1)
1