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J. Peter
J. Peter
IBM
Electronic circuit
Electronic engineering
Computer science
PowerPC
Logic synthesis
2
Papers
47
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A 1 GHz single-issue 64 b PowerPC processor
2000
ISSCC | International Solid-State Circuits Conference
Peter Hofstee
Naoaki Aoki
David William Boerstler
Paula Kristine Coulman
Sang Hoo Dhong
Brian Flachs
Nobuo Kojima
O. Kwon
Kyung Tek Lee
David Meltzer
Kevin J. Nowka
J. Park
J. Peter
Stephen D. Posluszny
Michael J. Shapiro
Joel Abraham Silberman
Osamu Takahashi
B. Weinberger
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Citations (26)
“Timing closure by design,” a high frequency microprocessor design methodology
2000
DAC | Design Automation Conference
Stephen D. Posluszny
Naoaki Aoki
David William Boerstler
Paula Kristine Coulman
Sang Hoo Dhong
B. Flachs
Peter Hofstee
Nobuo Kojima
Ohsang Kwon
K. Lee
David Meltzer
Kevin J. Nowka
J. Park
J. Peter
Joel Abraham Silberman
Osamu Takahashi
P. Villarrubial
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Citations (21)
1