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Chiatze Huang
Chiatze Huang
NAND gate
Logic gate
Physics
Optoelectronics
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5
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33
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A Vertical 2T NOR (V2T) Architecture to Enable Scaling and Low-Power Solutions for NOR Flash Technology
2020
VLSIT | Symposium on VLSI Technology
Hang-Ting Lue
Tzu-Hsuan Hsu
Teng-Hao Yeh
Wei-Chen Chen
Chieh Roger Lo
Chiatze Huang
Guan-Ru Lee
Chia-Jung Chiu
Keh-Chung Wang
Chih-Yuan Lu
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An Extremely Scaled Hemi-Cylindrical (HC) 3D NAND Device with Large Vt Memory Window $( > 10\mathrm{V})$ and Excellent 100K Endurance
2020
VLSIT | Symposium on VLSI Technology
Pei-Ying Du
Hang-Ting Lue
Teng-Hao Yeh
Tzu-Hsuan Hsu
Wei-Chen Chen
Chiatze Huang
Guan-Ru Lee
Min-Feng Hung
Chia-Jung Chiu
Keh-Chung Wang
Chih-Yuan Lu
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A Novel Double-Density Hemi-Cylindrical (HC) Structure to Produce More than Double Memory Density Enhancement for 3D NAND Flash
2019
IEDM | International Electron Devices Meeting
Hang-Ting Lue
Yu-Wei Jiang
Min-Feng Hung
Yan Ru Su
Li Yang-liang
Chih-Wei Hu
Chia-Jung Chiu
Keh-Chung Wang
Chih-Yuan Lu
Teng-Hao Yeh
Pei-Ying Du
Roger Lo
Wei-Chen Chen
Tzu-Hsuan Hsu
Chiatze Huang
Guan-Ru Lee
Chih-Ping Chen
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A novel double-density, single-gate vertical channel (SGVC) 3D NAND Flash that is tolerant to deep vertical etching CD variation and possesses robust read-disturb immunity
2015
IEDM | International Electron Devices Meeting
Hang-Ting Lue
Tzu-Hsuan Hsu
Chen Jun-wu
Wei-Chen Chen
Teng-Hao Yeh
Kuo-Pin Chang
Chih-Chang Hsieh
Pei-Ying Du
Yi-Hsuan Hsiao
Yu Wei-jiang
Guan-Ru Lee
Roger Lo
Yan-Ru Su
Chiatze Huang
Sheng-Chih Lai
Li Yang-liang
Chieh-Fang Chen
Min-Feng Hung
Chih-Wei Hu
Chia-Jung Chiu
Chih-Yuan Lu
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Citations (16)
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