Old Web
English
Sign In
Acemap
>
authorDetail
>
Hisakazu Otoi
Hisakazu Otoi
Mitsubishi
Electronic engineering
Computer science
Computer hardware
Parallel computing
Architecture
3
Papers
25
Citations
0.00
KQI
Citation Trend
Filter By
Interval:
1900~2024
1900
2024
Author
Papers (3)
Sort By
Default
Most Recent
Most Early
Most Citation
No data
Journal
Conference
Others
A 58-nm 2-Gb MLC “B4-Flash” Memory with Flexible Multisector Architecture
2017
IEEE Journal of Solid-state Circuits
Taku Ogura
Yasushi Kasa
Kazuhide Kurosaki
Mitsuhiro Tomoeda
Hisakazu Otoi
S. Shimizu
Masafumi Katsumata
Natsuo Ajika
Kazuo Kobayashi
Show All
Source
Cite
Save
Citations (0)
Byte alterable embedded EEPROM with B4-HE architecture achieving 10usec programming and 57F2 cell size
2014
IMW | International Memory Workshop
S. Shukuri
N. Ajika
S. Shimizu
Hisakazu Otoi
Masaaki Mihara
Yoshiki Kawajiri
Taku Ogura
Kazuo Kobayashi
M Nakashima
Show All
Source
Cite
Save
Citations (1)
A 500 MHz pipelined burst SRAM with improved SER immunity
1999
ISSCC | International Solid-State Circuits Conference
Hirotoshi Sato
Tomohisa Wada
Shigeki Ohbayashi
Kunihiko Kozaru
Yasuyuki Okamoto
Yoshiko Higashide
Tadayuki Shimizu
Yukio Maki
Rui Morimoto
Hisakazu Otoi
Tsuyoshi Koga
Hiroki Honda
Makoto Taniguchi
Yutaka Arita
Toru Shiomi
Show All
Source
Cite
Save
Citations (24)
1