A 58-nm 2-Gb MLC “B4-Flash” Memory with Flexible Multisector Architecture

2017 
A 58-nm 2-Gb multi-level cell (MLC) B4-Flash memory with flexible multisector architecture has been developed, which can be realized by unique features of B4-Flash with P-channel cell; large-data programming with small cell current thanks to back bias-assisted band-to-band tunneling-induced hot electron (B4-HE) injection mechanism, simple erase sequence without over-erase problem. In this architecture, each program and erase unit size can be extended from 256 B to 4 KB and from 256 KB to 4 MB, respectively, by utilizing 8 sectors & 2 banks simultaneous operation, and consequently 10 times faster 3.7 MB/s rewrite speed than that of conventional NOR flash can be realized by 4 KB / 980 $\mu \text{s}$ programming and 4 MB / 80 ms erasing. A fast 110-ns random access with enough read margin has been achieved by simultaneous parallel sensing at 3 op-amps with cell-bias compensation scheme. This paper proves that B4-Flash can be a candidate for various applications which need both fast rewrite speed and fast random access as a fast rewritable NOR-type flash with MLC capability and scalability.
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