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Garo Jacques Derderian
Garo Jacques Derderian
GlobalFoundries
Electrical engineering
Systematics
Engineering
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4
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10
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Understanding process and design systematics: Case study on monitoring strategy and understanding root cause of fin defectivity
2017
MIPRO | International Convention on Information and Communication Technology, Electronics and Microelectronics
Alisa Blauberg
Vikas Sachan
John Lemon
Garo Jacques Derderian
Ankit Jain
Barry Saville
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Understanding process and design systematics: Case study on monitoring strategy and understanding root cause of fin defectivity
2017
ASMC | Advanced Semiconductor Manufacturing Conference
Alisa Blauberg
Vikas Sachan
John Lemon
Garo Jacques Derderian
Ankit Jain
Barry Saville
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Reduction of "dark gate" defects in replacement-metal-gate process and middle-of-line contacts for advanced planar CMOS and FinFET technology
2016
CSTIC | China Semiconductor Technology International Conference
Wen Pin Peng
Min-Hwa Chi
Yang Zhang
Garo Jacques Derderian
Jeremy A. Wahl
Yue Hu
Yajiang Liu
Haiting Wang
John Lemon
Tao Wang
Jiwang Mao
Shi You
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Elimination of Tungsten-voids in middle-of-line contacts for advanced planar CMOS AND FinFET technology
2016
CSTIC | China Semiconductor Technology International Conference
Wen Pin Peng
Min-Hwa Chi
Garo Jacques Derderian
Kakoli Das
Yang Zhang
Jean-Baptiste Laloe
Derya Deniz
Suraj K. Patil
Jianghu Yan
Sherjang Singh
Xiaodong Zhang
Lei Zhu
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Citations (3)
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