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Pedro Neto
Pedro Neto
Xilinx
Computer science
Electronic engineering
Communication channel
Transceiver
Phase-locked loop
5
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35
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A 2.25pJ/bit Multi-lane Transceiver for Short Reach Intra-package and Inter-package Communication in 16nm FinFET
2019
CICC | Custom Integrated Circuits Conference
Marc Erett
Declan Carey
Ronan Casey
James Hudner
Kevin Geary
Ted Lee
Mayank Raj
Hongtao Zhang
Arianne Roldan
Hongyuan Zhao
Ping-Chuan Chiang
Haibing Zhao
Nakul Narang
Pedro Neto
Bruce Xu
Winson Lin
Kee Hian Tan
Yohan Frans
Ken Chang
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Citations (1)
A 112GB/S PAM4 Wireline Receiver Using a 64-Way Time-Interleaved SAR ADC in 16NM FinFET
2018
VLSIC | Symposium on VLSI Circuits
James Hudner
Declan Carey
Ronan Casey
Kay Hearne
Pedro Neto
Ilias Chlis
Marc Erett
Chi Fung Poon
Asma Laraba
Hongtao Zhang
Sai Lalith Chaitanya Ambatipudi
David Mahashin
Parag Upadhyaya
Yohan Frans
Ken Chang
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Citations (16)
A 126mW 56Gb/s NRZ wireline transceiver for synchronous short-reach applications in 16nm FinFET
2018
ISSCC | International Solid-State Circuits Conference
Marc Erett
Declan Carey
James Hudner
Ronan Casey
Kevin Geary
Pedro Neto
Mayank Raj
Scott McLeod
Hongtao Zhang
Arianne Roldan
Hongyuan Zhao
Ping-Chuan Chiang
Haibing Zhao
Kee Hian Tan
Yohan Frans
Ken Chang
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Citations (11)
A 0.5–16.3 Gbps Multi-Standard Serial Transceiver With 219 mW/Channel in 16-nm FinFET
2017
IEEE Journal of Solid-state Circuits
Marc Erett
James Hudner
Declan Carey
Ronan Casey
Kevin Geary
Kay Hearne
Pedro Neto
Thomas Mallard
Vikas Sooden
Mark Smyth
Yohan Frans
Jay Im
Parag Upadhyaya
Wenfeng Zhang
Winson Lin
Bruce Xu
Ken Chang
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Citations (6)
A 0.5-16.3Gbps multi-standard serial transceiver with 219mW/channel in 16nm FinFET
2016
ESSCIRC | European Solid-State Circuits Conference
Marc Erett
James Hudner
Declan Carey
Ronan Casey
Kevin Geary
Kay Hearne
Pedro Neto
Thomas Mallard
Vikas Sooden
Mark Smyth
Yohan Frans
Jay Im
Parag Upadhyaya
Wenfeng Zhang
Winson Lin
Bruce Xu
Ken Chang
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Citations (1)
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