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J. L. Kuo
J. L. Kuo
National Chiao Tung University
Engineering
Electronic engineering
Standby power
Logic gate
Transistor
2
Papers
4
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An Energy Efficient FinFET-based Field Programmable Synapse Array (FPSA) Feasible for One-shot Learning on EDGE AI
2018
VLSIT | Symposium on VLSI Technology
J. L. Kuo
Hua-Mao Chen
E. R. Hsieh
Steve S. Chung
T. P. Chen
Shih An Huang
J. Chen
Osbert Cheng
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First demonstration of flash RRAM on pure CMOS logic 14nm FinFET platform featuring excellent immunity to sneak-path and MLC capability
2017
VLSIT | Symposium on VLSI Technology
E. R. Hsieh
Y.C. Kuo
Chun-Hu Cheng
J. L. Kuo
Meng-Ru Jiang
Jian-Li Lin
H.-W. Cheng
Steve S. Chung
Chuan Hsi Liu
T. P. Chen
Y. H. Yeah
Tai-Ju Chen
Osbert Cheng
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Citations (3)
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