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W. Mueller
W. Mueller
IBM
Electrical engineering
Electronic engineering
Capacitor
Transistor
Dram
3
Papers
7
Citations
0
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On the retention time distribution of dual-channel vertical DRAM technologies
2003
VLSI-TSA | International Symposium on VLSI Technology, Systems, and Applications
Jochen Beintner
Y. Li
D. Casarotto
Dureseti Chidambarrao
Kevin McStay
G. Wang
K. Hummler
Ramachandra Divakaruni
Wolfgang Bergner
E.F. Crabbe
W. Mueller
P. Poechmueller
Gary B. Bronner
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Citations (3)
A 110 nm 512 Mb DDR DRAM with vertical transistor trench cell
2002
VLSIC | Symposium on VLSI Circuits
Stefan Sunnyvale Wuensche
Mark D. Jacunski
H. Streif
Andre Sturm
Jack Morrish
Michael Roberge
M. Clark
T. Nostrand
Ernst Stahl
Scott C. Lewis
J. Heath
M. Wood
T. Vogelsang
Endre Philip Thoma
J. Gabric
M. Kleiner
Michael A. Killian
P. Poechmueller
W. Mueller
Gary B. Bronner
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Citations (1)
Vertical pass transistor design for sub-100 nm DRAM technologies
2002
VLSIT | Symposium on VLSI Technology
Kevin McStay
Dureseti Chidambarrao
Jack A. Mandelman
Jochen Beintner
Helmut Tews
Mary E. Weybright
G. Wang
Y. Li
K. Hummler
Ramachandra Divakaruni
W.Bergner
E.F. Crabbe
Gary B. Bronner
W. Mueller
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Citations (3)
1