Two-dimensional borderless contact pad technology for a 0.135 /spl mu/m/sup 2/ 4-gigabit DRAM cell
1997
We have developed a contact pad structure made by using a Ge-added anisotropic selective epitaxial Si growth technique and Si/sub 3/N/sub 4/ CMP technique. This contact structure has a large alignment tolerance not only for the word line but also for the isolation. We have used this structure to make a 0.135-/spl mu/m/sup 2/ folded-bit-line memory cell for a 4-gigabit DRAM with a 0.12-/spl mu/m design rule and have obtained 0.07-/spl mu/m alignment tolerance for both the word line and the isolation.
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