Gate-length- and threshold-voltage-dependent nonlinearity in the hot carrier DC lifetime extrapolation for sub-100-nm NMOS devices

1999 
In this paper, we discuss the issues involved in the DC hot carrier lifetime extrapolation of sub 100nm NMOS transistors. We look at device degradation due to hot- carrier injection in NMOS transistors with 20 angstrom and 25 angstrom thermal and nitrided oxide gate dielectrics. Stress conditions such as Vg Vt, Vd equals Vd, and Vg at Isubmax are evaluated. Previously, devices greater than 100nm gate length had highest hot carrier degradation at Vg at Isubmax and 1/Vdd linear extrapolation from accelerated stressing condition to operation condition was able to estate the DC lifetime. However, we show that the conventional extrapolation results in a nonlinear fit for devices with gate length hot carrier injection and channel hot carrier injection. For stress voltages lower than V critical, devices have worse degradation for Vg at Isubmax. For voltages greater than or equal to V critical, Vg equals Vd stressing is approximately the same as Vg at Isubmax stressing. If extrapolation is based only on voltages greater than V critical, then the lifetime could be very pessimistic. The extrapolation based on voltages less than V critical is more realistic to the operating condition.
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