EUV lithography at the 22nm technology node
2010
We are evaluating the readiness of extreme ultraviolet (EUV) lithography for insertion into production at the 15 nm
technology node by integrating it into standard semiconductor process flows because we believe that device integration
exercises provide the truest test of technology readiness and, at the same time, highlight the remaining critical issues. In
this paper, we describe the use of EUV lithography with the 0.25 NA Alpha Demo Tool (ADT) to pattern the contact and
first interconnect levels of a large (~24 mm x 32 mm) 22 nm node test chip using EUV masks with state-of-the-art
defectivity (~0.3 defects/cm 2 ). We have found that: 1) the quality of EUVL printing at the 22 nm node is considerably
higher than the printing produced with 193 nm immersion lithography; 2) printing at the 22 nm node with EUV
lithography results in higher yield than double exposure double-etch 193i lithography; and 3) EUV lithography with the
0.25 NA ADT is capable of supporting some early device development work at the 15 nm technology node.
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