Ferroelectric HfO2 Memory Transistors with High-κ Interfacial Layer and Write Endurance Exceeding 1010 Cycles

We demonstrate ferroelectric (FE) memory transistors on a crystalline silicon channel with endurance exceeding 1010 cycles. The ferroelectric transistors (FeFETs) incorporate a high- $\kappa $ interfacial layer (IL) of thermally grown silicon nitride (SiNx) and a thin 4.5 nm layer of Zr-doped FE-HfO2 (HZO) on a ~30 nm silicon on insulator (SOI) channel. The device shows a ~1V memory window (MW) in a DC sweep of just ± 2.5V, and can be programmed and erased with voltage pulses of $\text {V}_{\text {G}}= \pm \,\,3\text{V}$ at a pulse width of 250 ns. The device also shows very good retention behavior. These results indicate that appropriate engineering of the IL layer could substantially improve FeFET device performance and reliability.