Boron diffusion in boron-doped poly-Si/nitrogen-doped 4H-SiC structure was investigated by combining a reported model of poly-Si diffusion sources with the authors’ model of boron diffusion in 4H-SiC. By taking the limited supply of carbon interstitials at heterointerfaces into account, we determined a segregation coefficient of 4 to 8 and an activation energy of 0.20 eV in the temperature range of 650 to 1000°C.
The authors describe a planar process for the AlGaAs/GaAs HBTs in which collector vias are buried selectively, even to the base layers, with chemical vapor deposited tungsten (CVD-W) films. By using WF/sub 6//SiH/sub 4/ chemistry, W could be deposited on Pt films, which were overlapped 50 nm thick on the AuGe-based collector electrodes, without depositing W on the surrounding SiO/sub 2/ layers. Current gains of planar HBTs with 3.5- mu m*3.5- mu m emitters were up to 150, for a collector current density of about 2.5*10/sup 4/ A/cm/sup 2/.< >
A commercial-simulator-based numerical-analysis methodology for 4H-SiC power devices formed on misoriented (0001) substrates is proposed and applied for analyzing avalanche breakdown of floating-field-ring-terminated p-n diodes. Due to the inexpedience of a fixed orientation of the (0001) surface in current commercial device simulators, 4H-SiC (0001) surface is etched to form a miscut to separate the known effects of asymmetric nature of impact ionization and asymmetric aluminum concentration contours. 2-D process simulation of etching a 4H-SiC (0001) surface to expose a sloped surface, patterning the sloped surface with a mask, vertically implanting aluminum ions into the masked surface, removing the mask, and forming electrodes and a SiO 2 passivation film was carried out. This process simulation revealed asymmetric lateral straggling of implanted aluminum acceptors. The subsequent device simulation, which assumed fixed charge at the SiO 2 /4H-SiC interface, revealed asymmetric avalanche breakdown voltage in the misoriented direction and the opposite direction. This asymmetric breakdown qualitatively explains the previously reported nonuniform luminescence at breakdown. The proposed methodology is considered to be applicable to other power devices with other termination structures formed on misoriented 4H-SiC (0001) substrates.
A novel AlGaAs/GaAs HBT (heterojunction bipolar transistor) structure with buried SiO/sub 2/ and polycrystalline GaAs (poly-GaAs) in the extrinsic base and collector is presented. The lower dielectric constant of SiO/sub 2/ and complete carrier depletion of n-type poly-GaAs have reduced the extrinsic component of C/sub BC/ (base-collector capacitance) to 30% while f/sub T/ has been kept high by a thin intrinsic collector. By using newly developed low-resistance p-type poly-GaAs for the base electrode, further reduction in C/sub BC/ is expected with a one-dimensional transistor structure, such as SICOS.
Surface-diffusion length of aluminum-containing species (λAl) on 4H-SiC (0001) is estimated from the reported aluminum concentrations in 4H-SiC grown by chemical vapor deposition flowing SiH4, C3H8, trimethylaluminum, and H2 under carbon-rich conditions. Based on the surface-diffusion theory dealing with step dynamics, λAl at 1550 °C is estimated to be about 2 nm or less, which is shorter than a half of the mean distance of steps on an 8°-off (0001) surface (i.e. 3.6 nm). This explains why the reported aluminum concentration in 4H-SiC grown on an 8°-off (0001) substrate was larger than that grown on a 4°-off (0001) substrate.
Trench-filling epitaxial growth of 4H-SiC was analyzed based on a simulation model for continuous fluid approximation including the Gibbs-Thomson effect. With the use of the radii of curvature at the top and bottom of the trenches, the proposed model well reproduced the measured dependence of the growth rate on the trench pitch ( L ) in the case of narrow ( L ≤ 6.0 μm) trenches.
InGaP/GaAs heterojunction bipolar transistors (HBTs) with polycrystalline GaAs buried under the base electrode have been fabricated using low-temperature gas-source molecular beam epitaxy on SiO 2 -patterned substrates. A cutoff frequency of 120 GHz and a maximum oscillation frequency of 230 GHz were obtained for three parallel 0.7×8.5 μm HBTs. Compared to HBTs without the polycrystal, the collector capacitance was reduced by 28% and the maximum stable gain was improved by 1.2 dB due to complete carrier depletion in the polycrystal under the base electrode. These results show the high potential of the proposed HBTs for high-speed digital and broadband-amplifier applications.
By eliminating the influence of surface recombination, the reported consideration that on‐resistance of GaN p + n diodes fabricated on free‐standing substrates should be limited by nonradiative recombination around dislocation lines is validated. The validation is based on analyses of 1) bulk nonradiative recombination current densities ( J nr ), determined from the y intercept of forward‐current density/inverse of anode radius plots, of diodes fabricated on two kinds of vapor‐phase epitaxially grown freestanding substrates (i.e., maskless 3D [M‐3D, dislocation density N dis ≤ 4 × 10 5 cm −2 ] and void‐assisted separation [VAS, N dis = 1–4 × 10 6 cm −2 ]) and 2) distributions of two‐photon photoluminescence (2PPL) from an n‐GaN layer identifying dislocations as dark spots. Based on the extracted values of J nr , the Shockley–Read–Hall lifetime of GaN p + n diodes on M‐3D and VAS substrates, and are, respectively, estimated to be 11 and 2 ns. Under the assumption of high excitation for the 2PPL measurement, the use of of 11 ns reproduces the 2PPL data with the effective dislocation radius ranging from 0.2 to 2 nm.
Fuji Electric developed a 1200V class RC-IGBT based on our latest thin wafer process. The performance of this RC-IGBT shows the same relationship between conduction loss and switching loss as our 6 th generation conventional IGBT and FWD. In addition its trade-off can be optimized for hard switching by lifetime killer. Calculations of the hard switching inverter loss and chip junction temperature (Tj) show that the optimized RC-IGBT can handle 35% larger current density per chip area. In order to utilize the high performance characteristics of the RC-IGBT, we assembled them in our newly developed compact package. This module can handle 58% higher current than conventional 100A modules at a 51% smaller footprint.
