Old Web
English
Sign In
Acemap
>
authorDetail
>
Richard J. Eickemeyer
Richard J. Eickemeyer
Computer science
CMOS
CPU cache
Electronic engineering
Static random-access memory
3
Papers
350
Citations
0.00
KQI
Citation Trend
Filter By
Interval:
1900~2024
1900
2024
Author
Papers (3)
Sort By
Default
Most Recent
Most Early
Most Citation
No data
Journal
Conference
Others
Disaggregated and optically interconnected memory: when will it be cost effective?
2015
arXiv: Distributed, Parallel, and Cluster Computing
Bulent Abali
Richard J. Eickemeyer
Hubertus Franke
Chung-Sheng Li
Marc A. Taubenblatt
Show All
Source
Cite
Save
Citations (24)
An 8T-SRAM for Variability Tolerance and Low-Voltage Operation in High-Performance Caches
2008
VLSIC | Symposium on VLSI Circuits
Leland Chang
Robert K. Montoye
Yutaka Nakamura
Kevin A. Batson
Richard J. Eickemeyer
Robert H. Dennard
Wilfried Haensch
Damir A. Jamsek
Show All
Source
Cite
Save
Citations (0)
An 8T-SRAM for Variability Tolerance and Low-Voltage Operation in High-Performance Caches
2008
IEEE Journal of Solid-state Circuits
Leland Chang
Robert K. Montoye
Yutaka Nakamura
Kevin A. Batson
Richard J. Eickemeyer
Robert H. Dennard
Wilfried Haensch
Damir A. Jamsek
Show All
Source
Cite
Save
Citations (326)
1