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T. Ohtani
T. Ohtani
NEC
Logic gate
Application-specific integrated circuit
Clock skew
Parallel computing
Read-write memory
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A 1856 I/O cell CMOS SOG with half-ns clock skew and a 6 ns RAM
1989
Applied Nursing Research
T. Ohtani
K. Yoshida
Y. Matsuda
T. Daitoh
H. Mizumura
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