Old Web
English
Sign In
Acemap
>
authorDetail
>
Hisao Asakura
Hisao Asakura
Hitachi
Electronic engineering
Threshold voltage
Analytical chemistry
Dram
Engineering
5
Papers
3
Citations
0.00
KQI
Citation Trend
Filter By
Interval:
1900~2024
1900
2024
Author
Papers (4)
Sort By
Default
Most Recent
Most Early
Most Citation
No data
Journal
Conference
Others
Eliminating the Threshold-Voltage Offset of p-Channel Metal-Oxide-Semiconductor Field Effect Transistors in High-Density Dynamic Random Access Memory
2004
Japanese Journal of Applied Physics
Norikatsu Takaura
Riichiro Takemura
Hideyuki Matsuoka
Ryo Nagai
Satoru Yamada
Hisao Asakura
Shinichiro Kimura
Show All
Source
Cite
Save
Citations (1)
An advanced defect-monitoring test structure for electrical measurements and defect localization
2003
ICMTS | International Conference on Microelectronic Test Structures
Yuichi Hamamura
Takayuki Kumazawa
Kazuyuki Tsunokuni
Aritoshi Sugimoto
Hisao Asakura
Show All
Source
Cite
Save
Citations (2)
Using Dual-Gate PMOSFETs for High Performance G-bit DRAM Design
2001
Norikatsu Takaura
R. Nagai
Hisao Asakura
Satoru Yamada
S. Kimura
Shinmachi Ome
Show All
Source
Cite
Save
Citations (0)
A new method for analyzing boron penetration and gate depletion using dual-gate PMOSFETs for high performance G-bit DRAM design
2001
ICMTS | International Conference on Microelectronic Test Structures
Norikatsu Takaura
R. Nagai
Hisao Asakura
Satoru Yamada
S. Kimura
Show All
Source
Cite
Save
Citations (0)
1