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Jian Jiang
Jian Jiang
Fujitsu
Electronic engineering
Computer science
CMOS
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A 32Gb/s wireline receiver with a low-frequency equalizer, CTLE and 2-tap DFE in 28nm CMOS
2013
ISSCC | International Solid-State Circuits Conference
Samir Parikh
Tony Shuo-Chun Kao
Yasuo Hidaka
Jian Jiang
Asako Toda
Scott McLeod
William W. Walker
Yoichi Koyanagi
Toshiyuki Shibuya
Jun Yamada
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Citations (54)
A 4-Channel 3.1/10.3Gb/s Transceiver Macro with a Pattern-Tolerant Adaptive Equalizer
2007
ISSCC | International Solid-State Circuits Conference
Yasuo Hidaka
Weixin Gai
Akira Hattori
Takeshi Horie
Jian Jiang
Kouichi Kanda
Yoichi Koyanagi
Satoshi Matsubara
Hideki Osone
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Citations (13)
1