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Masayuki Ohayashi
Masayuki Ohayashi
Hitachi
Electronic engineering
Static random-access memory
BiCMOS
Emitter-coupled logic
CMOS
8
Papers
39
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A 0.65-ns, 72-kb ECL-CMOS RAM macro for a 1-Mb SRAM
1995
IEEE Journal of Solid-state Circuits
Hiroaki Nambu
Kazuo Kanetani
Youji Idei
Toru Masuda
Keiichi Higeta
Masayuki Ohayashi
Masami Usami
Kunihiko Yamaguchi
Toshiyuki Kikuchi
T. Ikeda
K. Ohhata
Takeshi Kusunoki
Noriyuki Homma
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Citations (17)
A 0.65-ns, 72-kb ECL-CMOS RAM Macro for a 1-Mb SRAM
1995
IEICE Transactions on Electronics
H. Nambu
Kazuo Kanetani
Youji Idei
Toru Masuda
Keiichi Higeta
Masayuki Ohayashi
M. Usami
K. Yamaguchi
Toshiyuki Kikuchi
T. Ikeda
Kenichi Ohhata
Takeshi Kusunoki
Noriyuki Homma
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A 1.5-ns 256-kb BiCMOS SRAM with 60-ps 11-K logic gates
1994
IEEE Journal of Solid-state Circuits
Nobuo Tamba
A. Anzai
Kazuhiro Akimoto
Masayuki Ohayashi
Toshiro Hiramoto
T. Kokubu
S. Ohmori
T. Muraya
A. Kishimoto
S Tsuji
H. Hayashi
N. Handa
T. Igarashi
Hiroaki Nambu
Masasuke Yoshida
Tsuyoshi Fujiwara
K Watanabe
Akihisa Uchida
Masanori Odaka
Kunihiko Yamaguchi
T. Ikeda
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Citations (4)
A 0.65ns, 72kb Ecl-cmos Ram Macro For A 1mb Sram
1994
VLSIC | Symposium on VLSI Circuits
Hiroaki Nambu
Kazuo Kanetani
Youji Idei
T. Masuda
Keiichi Higeta
Masayuki Ohayashi
Masami Usami
Kunihiko Yamaguchi
Toshiyuki Kikuchi
T. Ikeda
K. Ohhata
Takeshi Kusunoki
Noriyuki Homma
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Citations (7)
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