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M. Liehr
M. Liehr
SEMATECH
MOSFET
Electronic engineering
Atomic physics
Dielectric
Logic gate
2
Papers
15
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FinFET parasitic resistance reduction by segregating shallow Sb, Ge and As implants at the silicide interface
2012
VLSIT | Symposium on VLSI Technology
C.R. Kenney
K.-W. Ang
K. Matthews
M. Liehr
M. Minakais
J. Pater
Martin Rodgers
V. Kaushik
Steven W. Novak
S. Gausepohl
C. Hobbs
P. D. Kirsch
R. Jammy
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Comprehensive analysis of charge pumping data for trap identification
2011
IRPS | International Reliability Physics Symposium
D. Veksler
Gennadi Bersuker
A. Koudymov
Chadwin D. Young
M. Liehr
B. Taylor
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Citations (7)
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