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M. Minakais
M. Minakais
SEMATECH
MOSFET
Electronic engineering
Engineering
Logic gate
Gate dielectric
2
Papers
15
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Multi-technique study of defect generation in high-k gate stacks
2012
IRPS | International Reliability Physics Symposium
D. Veksler
G. Bersuker
Himanshu Madan
L. Vandelli
M. Minakais
K. Matthews
Chadwin D. Young
Suman Datta
C. Hobbs
P. D. Kirsch
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Citations (7)
FinFET parasitic resistance reduction by segregating shallow Sb, Ge and As implants at the silicide interface
2012
VLSIT | Symposium on VLSI Technology
C.R. Kenney
K.-W. Ang
K. Matthews
M. Liehr
M. Minakais
J. Pater
Martin Rodgers
V. Kaushik
Steven W. Novak
S. Gausepohl
C. Hobbs
P. D. Kirsch
R. Jammy
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Citations (8)
1