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N. Kusunoki
N. Kusunoki
Toshiba
Electronic engineering
Silicon
Metal gate
Gate dielectric
Engineering
3
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Advanced multi-high-operation-voltage I/O device design for 32nm gate-first HiK MG technology
2010
EDSSC | International Conference on Electron Devices and Solid-State Circuits
Xusheng Wu
Y. Hu
N. Kusunoki
Z. J. Yang
G. Yang
Y-W. Teh
R. Kirshnan
Siddarth A. Krishnan
Joseph F. Shepard
S. Han
Y. M. Lee
F. Arnaud
M. Sherony
John Sudijono
A. Steegen
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A study on aggressive proximity of embedded SiGe with comprehensive source drain extension engineering for 32 nm node high-performance pMOSFET technology
2009
ESSDERC | European Solid-State Device Research Conference
Hiroki Okamoto
Nobuaki Yasutake
N. Kusunoki
K. Adachi
Hiroshi Itokawa
Kiyotaka Miyano
T. Ishida
Akira Hokazono
Shigeru Kawanaka
Ichiro Mizushima
A. Azuma
Yoshiaki Toyoshima
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A novel simulation method for oxynitridation and re-oxidation
2000
SISPAD | International Conference on Simulation of Semiconductor Processes and Devices
N. Kusunoki
Takashi Shimizu
H. Hazama
Nobutoshi Aoki
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