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Naonobu Sukegawa
Naonobu Sukegawa
Hitachi
Parallel computing
Computer science
Computer hardware
Computer architecture
Chip
4
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18
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A powerful yet ecological parallel processing system using execution-based adaptive power-down control and compact quadruple-precision assist FPUs
2008
VLSIC | Symposium on VLSI Circuits
Hidetaka Aoki
Takayuki Kawahara
Masanao Yamaoka
Chihiro Yoshimura
Yoshiko Nagasaka
Koichi Takayama
Naonobu Sukegawa
Yusuke Fukumura
Masaya Nakahata
Hideo Sawamoto
Masanori Odaka
Takayasu Sakurai
Kenichi Kasai
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Citations (3)
Design and Power Performance Evaluation of On-Chip Memory Processor with Arithmetic Accelerators
2008
Chikafumi Takahashi
Mitsuhisa Sato
Daisuke Takahashi
Taisuke Boku
Akira Ukawa
Hiroshi Nakamura
Hidetaka Aoki
Hideo Sawamoto
Naonobu Sukegawa
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Power performance evaluation of on-chip memory processor with arithmetic accelerators
2007
Chikafumi Takahashi
Mitsuhisa Sato
Daisuke Takahashi
Taisuke Boku
Akira Ukawa
Hiroshi Nakamura
Hidetaka Aoki
Hideo Sawamoto
Naonobu Sukegawa
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Citations (1)
Node Architecture and Performance Evaluation of the Hitachi Super Technical Server SR8000
1999
ICPADS | International Conference on Parallel and Distributed Systems
Yoshiko Tamaki
Naonobu Sukegawa
Masanao Ito
Yoshikazu Tanaka
Masakazu Fukagawa
Tsutomu Sumimoto
Nobuhiro Ioki
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Citations (11)
1