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Praveen Vaidyanathan
Praveen Vaidyanathan
Micron Technology
Electronic engineering
Dram
Transistor
Computer science
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5
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2
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0
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Discrete Test Structure Device Degradation Analysis and Correlation to NAND Flash Circuit Operation
2010
WMED | Workshop on Microelectronics and Electron Devices
Jasper S. Gibbons
Puneet Sharma
Steve Porter
Jim Fulford
Praveen Vaidyanathan
Sheryll De Guzman
Pratap Murali
Ken W. Marr
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Using TCAD, Response Surface Model and Monte Carlo Methods to Model Processes and Reduce Device Variation
2009
SISPAD | International Conference on Simulation of Semiconductor Processes and Devices
Dipanjan Basu
J. Guha
P. Hatab
Praveen Vaidyanathan
Chandra Mouli
S. K. Groothuis
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Small-Signal Analysis andModeling ofAsymmetric Source/Drain Parasitic Resistances forDRAM Access Transistors inLow-Power Applications
2006
International Conference on Simulation of Semiconductor Processes and Devices
Matthew Ulrich
Praveen Vaidyanathan
Venkat Ananthan
Chandra Mouli
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Time-dependent dielectric breakdown of a recessed channel DRAM access device
2006
WMED | Workshop on Microelectronics and Electron Devices
Tim Owens
David K. Hwang
Praveen Vaidyanathan
Kunal R. Parekh
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