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Myo Ei Pa Pa
Myo Ei Pa Pa
Agency for Science, Technology and Research
Wafer-level packaging
Materials science
Electronic engineering
Embedded Wafer Level Ball Grid Array
Composite material
6
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44
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Via-in-Mold (ViM) process for embedded wafer level package (eWLP)
2013
EPTC | Electronics Packaging Technology Conference
Soon Wee Ho
Myo Ei Pa Pa
Chee Heng Fong
Zhonghai Wang
He Tong Kang
Ser Choong Chong
Tai Chong Chai
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A novel compact antenna with a low profile demonstrated on embedded wafer level packaging (EMWLP) technology
2011
ECTC | Electronic Components and Technology Conference
Lim Ying Ying
Ho Soon Wee David
Chong Ser Choong
Myo Ei Pa Pa
Lim Teck Guan
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Citations (4)
Development of Via in Mold (ViM) for embedded wafer level package (EWMLP)
2011
EPTC | Electronics Packaging Technology Conference
Soon Wee Ho
Myo Ei Pa Pa
Fernandez Moses Daniel
Wen Sheng Lee
Ser Choong Chong
Hyoung Joon Kim
Pinjala Damaruganath
Gao Shan
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Citations (6)
A Novel Compact Antenna with a Low Profile Demonstrated on Embedded Wafer Level Packaging (EMWLP) Technology
2011
Lim Ying Ying
Ho Soon Wee David
Chong Ser Choong
Myo Ei Pa Pa
Lim Teck Guan
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Citations (3)
A novel, wafer-level stacking method for low-chip yield and non-uniform, chip-size wafers for MEMS and 3D SIP applications
2008
ECTC | Electronic Components and Technology Conference
C. S. Premachandran
John H. Lau
Ling Xie
Ahmad Khairyanto
Kelvin Chen
Myo Ei Pa Pa
Michelle Chew
Won-Kyoung Choi
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Citations (19)
1