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B. Steiner
B. Steiner
Texas Tech University
Capacitor
RLC circuit
JFET
Electrical engineering
Transistor
4
Papers
41
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Suitability of N-ON Recessed Implanted Gate Vertical-Channel SiC JFETs for Optically Triggered 1200 V Solid-State Circuit Breakers
2016
IEEE Journal of Emerging and Selected Topics in Power Electronics
Victor Veliadis
B. Steiner
Kevin Lawson
Stephen B. Bayne
Damian Urciuoli
H. C. Ha
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Citations (4)
Suitability of N-ON recessed implanted gate vertical-channel SiC JFETs for optically triggered 1200 V solid-state-circuit-breakers
2015
WiPDA | IEEE Workshop on Wide Bandgap Power Devices and Applications
Victor Veliadis
B. Steiner
Kevin Lawson
Stephen B. Bayne
Damian Urciuoli
H. C. Ha
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Citations (10)
Reliable Operation of SiC JFET Subjected to Over 2.4 Million 1200-V/115-A Hard Switching Events at 150 $^{\circ}\hbox{C}$
2013
IEEE Electron Device Letters
Victor Veliadis
B. Steiner
Kevin Lawson
Stephen B. Bayne
Damian Urciuoli
H. C. Ha
Nabil El-Hinnawy
Swastik Gupta
Pavel Borodulin
Robert S. Howell
Charles Scozzie
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Citations (24)
Reliable Operation of SiC Junction-Field-Effect-Transistor Subjected to over 2 Million 600-V Hard Switch Stressing Events
2013
Materials Science Forum
B. Steiner
Stephen B. Bayne
Victor Veliadis
H. C. Ha
Damian Urciuoli
N. El Hinnawy
Pavel Borodulin
Charles Scozzie
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Citations (3)
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