JFET

The junction gate field-effect transistor (JFET or JUGFET) is one of the simplest types of field-effect transistor. JFETs are three-terminal semiconductor devices that can be used as electronically-controlled switches, amplifiers, or voltage-controlled resistors. The junction gate field-effect transistor (JFET or JUGFET) is one of the simplest types of field-effect transistor. JFETs are three-terminal semiconductor devices that can be used as electronically-controlled switches, amplifiers, or voltage-controlled resistors. Unlike bipolar transistors, JFETs are exclusively voltage-controlled in that they do not need a biasing current. Electric charge flows through a semiconducting channel between source and drain terminals. By applying a reverse bias voltage to a gate terminal, the channel is 'pinched', so that the electric current is impeded or switched off completely. A JFET is usually ON when there is no voltage between its gate and source terminals. If a potential difference of the proper polarity is applied between its gate and source terminals, the JFET will be more resistive to current flow, which means less current would flow in the channel between the source and drain terminals. JFETs are sometimes referred to as depletion-mode devices as they rely on the principle of a depletion region which is devoid of majority charge carriers; and the depletion region has to be closed to enable current to flow. JFETs can have an n-type or p-type channel. In the n-type, if the voltage applied to the gate is less than that applied to the source, the current will be reduced (similarly in the p-type, if the voltage applied to the gate is greater than that applied to the source). A JFET has a large input impedance (sometimes on the order of 1010 ohms), which means that it has a negligible effect on external components or circuits connected to its gate. A succession of FET-like devices was patented by Julius Lilienfeld in the 1920s and 1930s. However, materials science and fabrication technology would require decades of advances before FETs could actually be manufactured. JFET was first patented by Heinrich Welker in 1945. During 1940s, researchers John Bardeen, Walter Houser Brattain, and William Shockley were trying to build a FET, but failed in their repeated attempts to make a FET. They discovered the point-contact transistor in the course of trying to diagnose the reasons for their failures. Following Shockley's theoretical treatment on JFET in 1952, a working practical JFET was made in 1953 by George F. Dacey and Ian M. Ross. Japanese engineers Jun-ichi Nishizawa and Y. Watanabe applied for a patent for a similar device in 1950 termed Static induction transistor (SIT). The SIT is a type of JFET with a short channel length. The JFET is a long channel of semiconductor material, doped to contain an abundance of positive charge carriers or holes (p-type), or of negative carriers or electrons (n-type). Ohmic contacts at each end form the source (S) and the drain (D). A pn-junction is formed on one or both sides of the channel, or surrounding it, using a region with doping opposite to that of the channel, and biased using an ohmic gate contact (G). JFET operation can be compared to that of a garden hose. The flow of water through a hose can be controlled by squeezing it to reduce the cross section and the flow of electric charge through a JFET is controlled by constricting the current-carrying channel. The current also depends on the electric field between source and drain (analogous to the difference in pressure on either end of the hose). This current dependency is not supported by the characteristics shown in the diagram above a certain applied voltage. This is the saturation region, and the JFET is normally operated in this constant-current region where device current is virtually unaffected by drain-source voltage. The JFET shares this constant-current characteristic with junction transistors and with thermionic tube (valve) tetrodes and pentodes. Constriction of the conducting channel is accomplished using the field effect: a voltage between the gate and the source is applied to reverse bias the gate-source pn-junction, thereby widening the depletion layer of this junction (see top figure), encroaching upon the conducting channel and restricting its cross-sectional area. The depletion layer is so-called because it is depleted of mobile carriers and so is electrically non-conducting for practical purposes. When the depletion layer spans the width of the conduction channel, pinch-off is achieved and drain-to-source conduction stops. Pinch-off occurs at a particular reverse bias (VGS) of the gate-source junction. The pinch-off voltage (Vp) varies considerably, even among devices of the same type. For example, VGS(off) for the Temic J202 device varies from −0.8 V to −4 V. Typical values vary from −0.3 V to −10 V.