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Hsi-Ching Wang
Hsi-Ching Wang
TSMC
Physics
Electronic engineering
Electrical engineering
Optoelectronics
Gate dielectric
3
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19
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A Reliability Enhanced 5nm CMOS Technology Featuring 5 th Generation FinFET with Fully-Developed EUV and High Mobility Channel for Mobile SoC and High Performance Computing Application
2020
IEDM | International Electron Devices Meeting
J.C. Liu
S. Mukhopadhyay
Amit Kundu
Shu-Han Chen
Hsi-Ching Wang
D. S. Huang
J. H. Lee
M.I. Wang
Ryan Lu
Shy-Jay Lin
Yung-Shun Chen
H. L. Shang
Ping-Wei Wang
H. C. Lin
Geoffrey Yeap
Jun He
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High performance passive devices for millimeter wave system integration on integrated fan-out (InFO) wafer level packaging technology
2015
IEDM | International Electron Devices Meeting
Chung-Hao Tsai
Jeng-Shien Hsieh
Wei-Heng Lin
Liang-Ju Yen
Jeng-Nan Hung
Tai-Hao Peng
Hsi-Ching Wang
Cheng-Yu Kuo
Issac Huang
Welling Chu
Yi-Yang Lei
Chung-Yi Yu
Lawrence Chiang Sheu
C. Y. Hsieh
C. S. Liu
Kuo-Chung Yee
Chuei-Tang Wang
Doug C. H. Yu
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Citations (12)
Positive bias and temperature stress induced two-stage drain current degradation in HfSiON nMOSFETs
2005
IEDM | International Electron Devices Meeting
C.T. Chan
Chun-Jung Tang
Tahui Wang
Hsi-Ching Wang
D.D. Tang
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Citations (6)
1