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Dae-Joung Kim
Dae-Joung Kim
Samsung
Electronic engineering
Engineering
Scaling
Wafer
Cylinder
3
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7
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0
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Fully 3-Dimensional NOR Flash Cell with Recessed Channel and Cylindrical Floating Gate - A Scaling Direction for 65nm and Beyond
2006
VLSIT | Symposium on VLSI Technology
Sang-pil Sim
Kwang-Soo Kim
Heon Kyu Lee
Jung In Han
Wook Hyim Kwon
Jee Hoon Han
Bong Yong Lee
Cheol Jung
Jeung Hwan Park
Dae-Joung Kim
Dae Hyun Jang
Woong Lee
Chan-Kwang Park
Kinam Kim
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Is it possible to improve MEEF
2002
Seok-Hwan Oh
Hyoungkook Kim
Dae-Joung Kim
Young-Seok Kim
Chun-Suk Suh
Yong Sun Koh
Chang Lyong Song
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Wafer-induced reading error in metal sputtering process
2001
Dae-Joung Kim
Seok-Hwan Oh
Gi-Sung Yeo
Yong-Guk Bae
Jaehwan Kim
Young-Hee Kim
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