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Arch Zaliznyak
Arch Zaliznyak
Altera
Computer science
Embedded system
Field-programmable gate array
System on a chip
Chip
5
Papers
6
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0
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Chip Package Co-design and Physical Verification for Heterogeneous Integration
2021
ISQED | International Symposium on Quality Electronic Design
Rajsaktish Sankaranarayanan
Archanna Srinivasan
Arch Zaliznyak
Sreelekha Mittai
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Serial Protocol Compliance of an FPGA-Integrated Mixed-Signal
2007
Divya Vijayaraghavan
Ramanand Venkata
Arch Zaliznyak
Michael Zheng
Steven Shen
Binh Ton
Lana Chan
Steve Park
Chong Lee
Rakesh H. Patel
Richard G. Cliff
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Mixed Signal Verification of an FPGA-Embedded DDR3 SDRAM Memory Controller using ADMS
2007
Arch Zaliznyak
Malik Kabani
John Lam
Chong Lee
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Multi-protocol embedded PCS IP in a FPGA-SOC
2005
CICC | Custom Integrated Circuits Conference
Ramanand Venkata
Vinson Chan
Binh Ton
Chong Lee
Huy Ngo
Malik Kabani
Tam Nguyen
Arch Zaliznyak
Ning Xue
Steven Shen
Michael Zheng
Michael Lai
Steve Park
Lana Chan
Divya Vijayaraghavan
John Lam
Rakesh H. Patel
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Architecture and methodology of a SoPC with 3.25Gbps CDR based SERDES and 1Gbps dynamic phase alignment
2003
CICC | Custom Integrated Circuits Conference
Ramanand Venkata
Wilson Wong
Tina Tran
Vinson Chan
Tim Tri Hoang
Henry Y. Lui
Binh Ton
S. Shumurayev
Chong Lee
Shoujun Wang
Huy Ngo
Malik Kabani
Victor Maruri
Tin H. Lai
Tam Nguyen
Arch Zaliznyak
Mei Luo
Toan Nguyen
Kazi Asaduzzaman
Simardeep Maangat
John Lam
Rakesh H. Patel
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Citations (5)
1