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G. Chabanne
G. Chabanne
Soitec
Silicon on insulator
Wafer
Electronic engineering
Semiconductor
high density
4
Papers
9
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0
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Buried SiGe as a performance booster in n-channel FDSOI MOSFETs
2019
Solid-state Electronics
Paul A. Clifton
Andreas Goebel
Robert Mulfinger
Amy Child
Sherry Straub
Ryan Sporer
Rick Carter
J. Kluth
Jamie Schaeffer
Bich-Yen Nguyen
G. Chabanne
Nicolas Daval
Walter Schwarzenbach
Manish Hemkar
Schubert S. Chu
S. Moffatt
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Citations (1)
Advanced FD-SOI and Beyond Low Temperature SmartCutTM Enables High Density 3D SoC Applications
2019
IEEE Journal of the Electron Devices Society
Walter Schwarzenbach
B-Y. Nguyen
Ludovic Ecarnot
S. Loubriat
M. Detard
E. Cela
C. Bertrand-Giuliani
G. Chabanne
C. Maddalon
Nicolas Daval
Christophe Maleville
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Beyond advanced FDSOI: Low Temp SmartCut for enabling High Density 3D SoC applications
2018
S3S | IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference
Walter Schwarzenbach
B-Y. Nguyen
Ludovic Ecarnot
S. Loubriat
M. Detard
E. Cela
C. Bertrand-Giuliani
G. Chabanne
C. Maddalon
N. Daval
C. Girard
Christophe Maleville
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Strained silicon on insulator substrates for fully depleted application
2012
ICICDT | International Conference on IC Design and Technology
Walter Schwarzenbach
N. Daval
Sebastien Kerdiles
G. Chabanne
Christophe Figuet
S. Guerroudj
Olivier Bonnin
X. Cauchy
B-Y. Nguyen
Christophe Maleville
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Citations (4)
1