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V. Varadarajan
V. Varadarajan
IBM
Electronic engineering
MOSFET
Modeling and simulation
Physics
Short-channel effect
2
Papers
4
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0
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2 nd Generation dual-channel optimization with cSiGe for 22nm HP technology and beyond
2013
IEDM | International Electron Devices Meeting
C. Ortolland
D. Jaeger
Timothy J. McArdle
C. DeWan
Robert R. Robison
Kai Zhao
Jin Cai
Paul Chang
Yaocheng Liu
V. Varadarajan
G. Wang
Anthony I. Chou
Dimitris P. Ioannou
Philip J. Oldiges
P. Agnello
Shreesh Narasimha
Vijay Narayanan
G. Freeman
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Citations (3)
Blanket SMT With In Situ N2 Plasma Treatment on the $\langle \hbox{100} \rangle$ Wafer for the Low-Cost Low-Power Technology Application
2009
IEEE Electron Device Letters
Jun Yuan
Victor Chan
Nivo Rovedo
Viraj Y. Sardesai
Narasimhulu Kanike
V. Varadarajan
M. Yu
Jong-Ho Yang
Y.K. Jeong
O.S. Kwon
Michael P. Belyansky
M. Eller
Yong Meng Lee
N. Cave
Huiling Shang
Y. Li
Ramachandra Divakaruni
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