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L. Pantisano
L. Pantisano
GlobalFoundries
Static random-access memory
Optoelectronics
Gate dielectric
Logic gate
Electronic engineering
2
Papers
6
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0
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High Performance and Yield for Super Steep Retrograde Wells (SSRW) by Well Implant / Si-based Epitaxy on Advanced Technology FinFETs
2019
DRC | Device Research Conference
U. Rana
D. P. Brunco
S. Raman
Dina H. Triyoso
M.W. Stoker
J. B. Johnson
L. Pantisano
K. D. Seo
M. Zhao
Alexander Reznicek
R. Krishnan
B. Moser
J. Freeman
L. Jang
E. Kaganer
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Citations (2)
Multiple Workfunction High Performance FinFETs for Ultra-low Voltage Operation
2018
VLSIT | Symposium on VLSI Technology
Mitsuhiro Togo
Ram Asra
Pala Balasubramaniam
Xunyuan Zhang
Hong Yu
S. Yamaguchi
E. Geiss
H. S. Yang
B. Cohen
H-C. Lo
Owen Hu
H. Lazar
O. Kwon
David Burnett
J. Versaggi
Edmund Kenneth Banghart
M. K. Hassan
E. Bazizi
L. Pantisano
J. G. Lee
Srikanth Samavedam
D.K. Sohn
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Citations (4)
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