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Kenichiro Mimoto
Kenichiro Mimoto
Toshiba
Computer science
Parallel computing
Macro
Dram
Redundancy (engineering)
4
Papers
40
Citations
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Interface socket design methodology to generate embedded DRAM macros
2001
CICC | Custom Integrated Circuits Conference
Ryo Haga
Tetsuya Kaneko
Atsushi Nakayama
Shinji Miyano
Hiroyuki Takenaka
Kenji Numata
Hiroyuki Koinuma
Takehiko Hojo
Akikuni Sato
Toshiyuki Kouchi
Kenichiro Mimoto
Masaaki Tazawa
Tsutomu Ohkubo
Takanori Andou
Tetsuya Amano
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Dynamically shift-switched dataline redundancy suitable for DRAM macro with wide data bus
2000
IEEE Journal of Solid-state Circuits
Toshimasa Namekawa
Shinji Miyano
Ryo Fukuda
Ryo Haga
Osamu Wada
Hironori Banba
S. Takeda
K Suda
Kenichiro Mimoto
S. Yamaguchi
T. Ohkubo
H Takato
Kenji Numata
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Citations (12)
Dynamically shift-switched dataline redundancy suitable for DRAM macro with wide data bus
1999
VLSIC | Symposium on VLSI Circuits
Toshimasa Namekawa
Shinji Miyano
Ryo Fukuda
Ryo Haga
Osamu Wada
Hironori Banba
S. Takeda
K Suda
Kenichiro Mimoto
S. Yamaguchi
T. Ohkubo
H Takato
Kenji Numata
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Citations (9)
A configurable DRAM macro design for 2112 derivative organizations to be synthesized using a memory generator
1998
ISSCC | International Solid-State Circuits Conference
Tomoaki Yabe
Shinji Miyano
Kazuyuki Sato
Masaharu Wada
Ryo Haga
Osamu Wada
Motohiro Enkaku
T. Hojyo
Kenichiro Mimoto
Masaaki Tazawa
F. Ohkubo
Kenji Numata
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Citations (19)
1